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Cypress Semiconductor /psoc63 /GPIO /PRT[12] /IN

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Interpret as IN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (IN0)IN0 0 (IN1)IN1 0 (IN2)IN2 0 (IN3)IN3 0 (IN4)IN4 0 (IN5)IN5 0 (IN6)IN6 0 (IN7)IN7 0 (FLT_IN)FLT_IN

Description

Port input state register

Fields

IN0

IO pin state for pin 0 ‘0’: Low logic level present on pin. ‘1’: High logic level present on pin.
IN1

IO pin state for pin 1
IN2

IO pin state for pin 2
IN3

IO pin state for pin 3
IN4

IO pin state for pin 4
IN5

IO pin state for pin 5
IN6

IO pin state for pin 6
IN7

IO pin state for pin 7
FLT_IN

Reads of this register return the logical state of the filtered pin as selected in the INTR_CFG.FLT_SEL register.

Links

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Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data